Memory Space Configuration; Ram Configuration; Table 3-1 Memory Space Configuration Bit Settings For The Dsp56309; Table 3-2 Ram Configuration Bit Settings For The Dsp56309 - Motorola DSP56309 User Manual

3.1.3

Memory Space Configuration

Memory space addressing is 24-bit by default. The DSP56309 switches to sixteen-bit
address compatibility mode by setting the sixteen-bit compatibility (SC) bit in the Status
Register (SR).

Table 3-1 Memory Space Configuration Bit Settings for the DSP56309

Bit
Abbreviation
SC
Memory maps for the different configurations are shown in Figure 3-1 through
Figure 3-8.
3.2

RAM CONFIGURATION

The DSP56309 contains 34K of RAM, divided by default into the following:
¥ Program RAM (20K)
¥ X data RAM (7K)
¥ Y data RAM (7K)
RAM configuration depends on two bits: the Cache Enable (CE) of the SR and the
Memory Select (MS) of the Operating Mode Register (OMR).

Table 3-2 RAM Configuration Bit Settings for the DSP56309

Bit
Abbreviation
CE
MS
MOTOROLA
Bit Name Bit Location
Sixteen-bit
Compatibility
Bit
Bit Name
Location
Cache SR 19
Enable
Memory OMR 7
Switch
DSP56309UM/D
Cleared = 0
Effect (Default)
SR 13 16M word
address space
(24-bit address)
Cleared = 0 Effect
(Default)
Cache Disabled
Program RAM 20K
X data RAM 7K
Y data RAM 7K
Memory Configuration
RAM Configuration
Set = 1 Effect
64K word
address space
(16-bit address)
Set = 1 Effect
Cache Enabled
1K
Program RAM 24K
X data RAM 5K
Y data RAM 5K
3-5