Motorola DSP56309 User Manual page 200

Enhanced Synchronous Serial Interface (ESSI)
ESSI Programming Model
TSMA and TSMB (in Figure 7-16 on page 7-31 and Figure 7-17 on page 7-32) can be seen
as a single 32-bit register, TSM. Bit n in TSM (TSn) is an enable/disable control bit for
transmission in slot number N. When TSn is cleared, all the transmit data signals of the
enabled transmitters are tri-stated during transmit time slot number N. The data is still
transferred from the enabled transmit data register(s) to the transmit shift register.
However, the TDE and the TUE flags are not set. This means that during a disabled slot,
no transmitter empty interrupt is generated. The DSP is interrupted only for enabled
slots. Data written to the transmit data register when servicing the transmitter empty
interrupt request is transmitted in the next enabled transmit time slot.
When TSn is set, the transmit sequence proceeds normally. Data is transferred from the
TX register to the shift register during slot number N and the TDE flag is set.
Using the TSM slot mask does not conflict with using the TSR. Even if a slot is enabled in
the TSM, you can write to the TSR to tri-state the signals of the enabled transmitters
during the next transmission slot. Setting the bits in the TSM affects the next frame
transmission. The frame currently being transmitted is not affected by the new TSM
setting. If the TSM is read, it shows the current setting.
After a hardware RESET signal or software RESET instruction, the TSM register is reset
to $FFFFFFFF; this setting enables all thirty-two slots for data transmission.
7.4.10 Receive Slot Mask Registers (RSMA, RSMB)
The receive slot mask registers are two 16-bit, read/write registers. In network mode,
these registers are used by the receiver(s) to determine what action to take in the current
time slot. Depending on the setting of the bits, the receiver(s) either tri-state the
receiver(s) data signal(s) or receive a data word and generate a receiver full condition.
RSMA and RSMB (in Figure 7-16 on page 7-31 and Figure 7-17 on page 7-32) can be seen
as one 32-bit register, RSM. Bit n in RSM (RSn) is an enable/disable control bit for time
slot number N. When RSn is cleared, all the data signals of the enabled receivers are
tri-stated during time slot number N. Data is transferred from the receive data register(s)
to the receive shift register(s) and the RDF and ROE flags are not set. During a disabled
slot, no receiver full interrupt is generated. The DSP is interrupted only for enabled slots.
When RSn is set, the receive sequence proceeds normally. Data is received during slot
number N, and the RDF flag is set.
Setting the bits in the RSM affects the next frame transmission. The frame currently
being transmitted is not affected by the new RSM setting. If the RSM is read, it shows the
current setting.
MOTOROLA DSP56309UM/D 7-35