Hitachi H8S/2633 Hardware Manual page 1089

MAR1AH—Memory Address Register 1AH
MAR1AL—Memory Address Register 1AL
31
Bit :
—
MAR1AH :
Initial value : 0
—
R/W :
15
Bit :
MAR1AL :
Initial value : *
R/W
R/W :
In short address mode: Specifies transfer destination/transfer source address
In full address mode:
*: Undefined
ETCR1A—Transfer Count Register 1A
Bit
ETCR1A
Initial value
R/W
Sequential mode
Idle mode
Normal mode
Repeat mode
Block transfer mode
*: Undefined
30 29 28 27
— — — —
0 0 0 0
— — — —
14 13 12 11
* * * *
R/W R/W R/W R/W
:
15 14 13 12
:
:
* * * *
:
R/W R/W R/W R/W
Holds number of transfers
Holds block size
H'FEF0
H'FEF2
26 25 24 23
— — —
0 0 0 *
— — — R/W
10 9 8 7
* * * *
R/W R/W R/W R/W
Not used
H'FEF6
11 10 9 8
* * * *
R/W R/W R/W R/W R/W
Transfer counter
22 21 20 19
* * * *
R/W R/W R/W R/W
6 5 4 3
* * * *
R/W R/W R/W R/W
7 6 5 4
* * * *
R/W R/W R/W R/W
Transfer counter
Block size counter
DMAC
DMAC
18 17 16
* * *
R/W R/W R/W
2 1 0
* * *
R/W R/W R/W
DMAC
3 2 1 0
* * * *
R/W R/W R/W
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