Toshiba GR200 Series Instruction Manual page 851

Nodes and formulae for interlock-check
(ii)
Figure 4.7-4 illustrates that an interlock-check is realized by using a number of nodes. For
each node, the user is required to configure input signals, interlock-operators, and links
between nodes. Following that, an interlock-check can be run.
Input A
Input B
Input C
Input D
Input E
Input F
Input G
Input H
Input I
Input J
Signal monitoring point
Figure 4.7-4 Operation of interlock-check
We can see that equation (4.7-10) is a representation of Figure 4.7-4. This equation is computed
in accordance with the priority order of the interlock-operators: the first is parentheses [()], the
second is AND [•], followed by OR [+].
Output = ((A+B) •C) + (D+E•F) + (G•(H+I) •J)
Node #1
OR (+)
Node #3
AND(• )
Node #5
OR (+)
Users can see signals at signal monitoring
points using the GR -TIE MS.
- 828 -
Node #2
AND(• )
Node #4
OR (+)
Node #6
AND(• )
6F2S1914 (0.49)
Node #7
AND(• )
Output
Users can see
signals by IED
screens.
(4.7-10)
GRL200 (Soft 033 & 037)