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3.2
Register Descriptions
There are six MMU-related registers.
1. PTEH
31
2. PTEL
31 30 29 28
— — —
3. PTEA
31
4. TTB
31
5. TEA
31
6. MMUCR
31
26
LRUI
— indicates a reserved bit: the write value must be 0, and a read will return 0.
VPN
PPN
Virtual address at which MMU exception or address error occurred
25
24 23
18 17 16 15
— —
URB
Figure 3.2 MMU-Related Registers
10 9
10 9
TTB
10 9
— —
URC
SQMD
Rev. 3.0, 04/02, page 55 of 1064
8
7
— —
ASID
8
7
6
5
4
3
2
— V SZ
PR
SZ C D SH WT
4
3
2
TC
8
7
6
5
4
3
2
SV — — — — — TI — AT
0
1
0
0
SA
0
0
1
0
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