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14.5
On-Demand Data Transfer Mode (DDT Mode)
14.5.1
Operation
Setting the DDT bit to 1 in DMAOR causes a transition to on-demand data transfer mode (DDT
mode). In DDT mode, it is possible to transfer to channel 0 to 3 via the data bus and DDT module,
and simultaneously issue a transfer request, using the
DTR.ID, and DTR.MD signals between an external device and the DMAC. Figure 14.23 shows a
block diagram of the DMAC, DDT, BSC, and an external device (with
, ID [1:0], DTR.ID, and DTR.MD pins).
DMAC
SAR0
DAR0
DMATCR0
CHCR0
DREQ0–3
ddtmode tdack id[1:0]
BSC
Data buffer
Figure 14.23 On-Demand Transfer Mode Block Diagram
After first making the normal DMA transfer settings for DMAC channels 0 to 3 using the CPU, a
transfer request is output from an external device using the
DTR.ID [1:0], and DTR.MD [1:0] signals (handshake protocol using the data bus). A transfer
request can also be issued simply by asserting
protocol without use of the data bus). For channel 2, after making the DMA transfer settings in the
normal way, a transfer request can be issued directly from an external device (with
,
,
simultaneously .
In DDT mode, there is a choice of five modes for performing DMA transfer.
Rev. 3.0, 04/02, page 520 of 1064
DDT
Request
controller
ddtmode
bavl
ID[1:0]
, DTR.ID [1:0], and DTR.MD [1:0] pins) by asserting
,
Data
buffer
, without using the external bus (handshake
,
,
, ID [1:0],
,
,
Memory
External
device (with
DTR
,
,
and ID [1:0])
FIFO or
memory
,
,
,
and
,
,
,
,
,
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