Table of Contents
Advertisement
22.2.15 PCI Configuration Register 17 (PCICONF17)
Bit:
31
DATA7
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Bit:
23
—
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Bit:
15
PMEST DTATSCL1 DTATSCL0 DATASEL3 DATASEL2 DATASEL1 DATASEL0 PMEEN
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Bit:
7
—
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
The PCI configuration register 17 (PCICONF17) is a 32-bit read/partial-write register that
accommodates the power management control/status (PMCSR), bridge-compatible PMCSR
extended (PMCSR_BSE), and data power management registers stipulated in the PCI power
management specifications. PCICONF17 is valid only when the PCIC is operating not as the host.
Bits 31 to 24 (data) and bits 23 to 16 (PMCSR_BSE) are not supported. The power management
status is read from bits 15 to 0 (PMCSR).
Bits 1 and 0 can be written to from both the PP bus and the PCI bus. Other bits are fixed in
hardware.
PCICONF17 is initialized to H'00000000 at a power-on reset and software reset.
Rev. 3.0, 04/02, page 836 of 1064
30
29
DATA6
DATA5
DATA4
0
0
R
R
R
R
22
21
—
—
0
0
R
R
R
R
14
13
0
0
R
R
R
R
6
5
—
—
0
0
R
R
R
R
28
27
DATA3
DATA2
0
0
R
R
R
R
20
19
—
—
0
0
R
R
R
R
12
11
0
0
R
R
R
R
4
3
—
—
0
0
R
R
R
R
26
25
24
DATA1
DATA0
0
0
R
R
R
R
18
17
16
—
—
0
0
R
R
R
R
10
9
0
0
R
R
R
R
2
1
—
PWRST1
PWRST0
0
0
R
R/W
R/W
R
R/W
R/W
0
R
R
—
0
R
R
8
0
R
R
0
0
Advertisement
Table of Contents
