Output Clock Control; Overview Of Watchdog Timer; Block Diagram; Figure 10.2 Block Diagram Of Wdt - Hitachi SH7751 Hardware Manual

10.6

Output Clock Control

The CKIO pin can be switched between clock output and a high-impedance state by means of the
CKOEN bit in the FRQCR register. When the CKIO pin goes to the high-impedance state, it is
pulled up.
10.7

Overview of Watchdog Timer

10.7.1

Block Diagram

Figure 10.2 shows a block diagram of the WDT.
Standby Standby
release
Internal reset
request
Interrupt
request
WTCSR: Watchdog timer control/status register
WTCNT: Watchdog timer counter
control
Reset
control
Interrupt
control
WTCSR

Figure 10.2 Block Diagram of WDT

WDT
Frequency divider
Clock selection
Clock selector
Overflow
WTCNT
Bus interface
Clock
Rev. 3.0, 04/02, page 253 of 1064
Standby
mode
Frequency
divider 2 ×1
clock