Bus Clock Frequency Register (I2Cxbcfr) - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

29.7.9 Bus clock frequency register (I2CxBCFR)

Address
Bit 31 30 29
Name
Ｒ Ｒ Ｒ
R/W
Initial value 0 0 0
Bit 15 14 13
Name
Ｒ Ｒ Ｒ
R/W
Initial
valu 0 0 0
e
Bit 7 and 4: Unused
The value is always "0000" on reads.
Bit 3-0: FS3-0 (Bus Clock Frequency Select 3-0)
Selects the frequency of the bus clock to be used. Characteristics such as noise filters are set
using this register. A standard setting value is shown below however adjustment might be
required depending on the I
FS3 FS2
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
29-20
ch0：FFF5_6000 + 18h ch1：FFF5_7000 + 18h
28 27 26 25
Ｒ Ｒ Ｒ Ｒ
0 0 0 0
12 11 10 9
(Reserved)
Ｒ Ｒ Ｒ Ｒ
0 0 0 0
2
C buffer characteristics and noise state on the I
FS1 FS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
24 23 22 21
(Reserved)
Ｒ Ｒ Ｒ Ｒ
0 0 0 0
8 7 6 5
(Reserved)
Ｒ
R R R
0 0 0 0
Frequency [MHz]
Setting prohibited
14 or more ~ Less than 20
20 or more ~ Less than 40
40 or more ~ Less than 60
–
–
–
–
–
–
–
–
–
–
–
–
20 19 18 17
Ｒ Ｒ Ｒ Ｒ
0 0 0 0
4 3 2 1
FS[3:0]
R R/W R/W R/W R/W
0 0 0 0
2
C bus.
16
Ｒ
0
0
1