Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
RGBS (RGB input Sync)
Register address
Bit number
Bit field name
R/W
Initial value
Edge detection of a synchronized signal is set up. It is used at the time of RGB input format.
Bit0
Bit1
Bit16
18-132
CaptureBaseAddress + 90h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
RX
X
VP (VSYNCI Polarity)
0
Negative edge of VINVSYNC is set to VSYNC.
1
Positive edge of VINVSYNC is set to VSYNC.
HP (HSYNCI Polarity)
0
Negative edge of VINHSYNC is set to HSYNC.
1
Positive edge of VINHSYNC is set to HSYNC.
RM(RGB Input Mode select)
Sets Direct RGB input mode
0
reserved
1
RGB666 Direct input Mode
9
8
RM
Reserved
R/
RX
W
1
X
7
6
5
4
3
2
1
0
HP VP
R/
R/
W
W
0
0
Advertisement
Table of Contents
