MB86R02 'Jade-D' Hardware Manual V1.64
6.3
Software Interface .............................................................................................................. 6-3
6.3.1
6.3.2
Global Address ............................................................................................................... 6-4
6.3.3
Register Summary .......................................................................................................... 6-4
Register Description .......................................................................................................................... 6-4
6.4
Processing Mode ................................................................................................................ 6-8
6.4.1
6.4.1.1
6.4.1.2
6.4.1.3
6.4.1.4
6.5
Control Flow ..................................................................................................................... 6-11
6.5.1
Operation ...................................................................................................................... 6-11
7
CCNT (Chip Control) ..................................................................................................................... 7-1
7.1
Overview ............................................................................................................................. 7-1
7.2
Features ............................................................................................................................. 7-2
7.3
Supply clock ....................................................................................................................... 7-2
7.4
Registers ............................................................................................................................ 7-3
7.4.1
Register list ..................................................................................................................... 7-3
7.4.2
CHIP ID register (CCID) ................................................................................................. 7-5
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
7.4.8
7.4.9
7.4.10
7.4.11
7.4.12
7.4.13
7.4.14
7.4.15
7.4.16
7.4.17
7.4.18
7.4.19
7.4.20
8
Remap Boot Controller (RBC) ....................................................................................................... 8-1
8.1
Outline ................................................................................................................................ 8-1
8.2
Features ............................................................................................................................. 8-1
8.3
Block Diagram .................................................................................................................... 8-1
8.4
Supply clock ....................................................................................................................... 8-2
8.5
Register .............................................................................................................................. 8-2
8.5.1
Register list ..................................................................................................................... 8-2
8.5.2
8.5.3
8.5.4
8.6
Operation ............................................................................................................................ 8-7
8.6.1
RBC reset ....................................................................................................................... 8-7
8.6.2
Remap control................................................................................................................. 8-7
8.6.3
VINITHI control ............................................................................................................... 8-7