Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
13.6.19
IO monitor register 1 (DRIMR1)
This is input level monitor of IO buffer which is used for impedance adjustment of OCD.
Address
Bit
15
14
13
Name
R/W
Initial value
X
X
X
Bit field
No.
Name
15-1
DQX[15:1]
0
DQX0
When input value of IO is read, IO driver should be in the OCD adjustment mode.
The following settings are required:
• Bit 0 of IO buffer setting OCD2 register (68
• Bit 1 of IO buffer setting OCD2 register (68
Remark:
Monitor value is valid only at OCD adjustment.
13.6.20
IO monitor register 2 (DRIMR2)
This is input level monitor of IO buffer which is used for impedance adjustment of OCD.
Address
Bit
15
14
13
Name
R/W
Initial value
X
X
X
Bit field
No.
Name
15-0
DQX[31:16]
When input value of IO is read, IO driver should be in the OCD adjustment mode.
The following settings are required:
• Bit 0 of IO buffer setting OCD2 register (68
• Bit 1 of IO buffer setting OCD2 register (68
Remark:
Monitor value is valid only at OCD adjustment.
13-24
12
11
10
9
X
X
X
X
Reserved
Write access is ignored.
X value of DQ0 can be read.
12
11
10
9
X
X
X
X
Reserved
Write access is ignored.
F300_0000
+ 90
H
H
8
7
6
5
DQX[15:0]
R
X
X
X
X
Description
) is set to "1".
H
) is set to "0".
H
F300_0000
+ 92
H
H
8
7
6
5
DQX[31:16]
R
X
X
X
X
Description
) is set to "1".
H
) is set to "0".
H
4
3
2
1
X
X
X
X
4
3
2
1
X
X
X
X
0
X
0
X
Advertisement
Table of Contents
