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X-Ref Target - Figure 1-1
4 GB DDR3 Memory
(SODIMM)
Differential Clock
GTH SMA Clock
XADC Header
User Switches,
Buttons, and LEDs
1 KB EEPROM
2
(I
C)
2
I
C Bus Switch
Feature Descriptions
Figure 1-2
is described in
Note:
board.
VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
4 GB DDR3 Memory
(SODIMM)
Virtex-7 FPGA
XC7VX690T-2FFG1761C
DIP Switch SW11
USB-to-UART
Config and
Bridge
Flash Addr
Figure 1-1: VC709 Board Block Diagram
shows the VC709 board. Each numbered feature that is referenced in
Table 1-1
and following sections.
The image in
Figure 1-2
is for reference only and might not reflect the current revision of the
www.xilinx.com
Feature Descriptions
HPC FMC Connector
128 MB Linear BPI
Flash Memory
SI5324C
Clock Recovery
8-lane PCI Express
Edge Connector
JTAG Interface
Micro-B USB
4X SFP+ Cage
Connector
UG887_c1_01_012113
Figure 1-2
7
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