Xilinx VC709 User Manual page 79

VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
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##
## DDR3 SODIMM B data group 4:
##
NET DDR3_B_DQS[4]_P
NET DDR3_B_DQS[4]_N
NET DDR3_B_DM[4]
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##
## DDR3 SODIMM B data group 5:
##
NET DDR3_B_DQS[5]_P
NET DDR3_B_DQS[5]_N
NET DDR3_B_DM[5]
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##
## DDR3 SODIMM B data group 6:
##
NET DDR3_B_DQS[6]_P
NET DDR3_B_DQS[6]_N
NET DDR3_B_DM[6]
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##
## DDR3 SODIMM B data group 7:
##
NET DDR3_B_DQS[7]_P
NET DDR3_B_DQS[7]_N
NET DDR3_B_DM[7]
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VC709 Board UCF Listing
LOC = BA25 ; # IO_L20N_T3_33
LOC = BB21 ; # IO_L23N_T3_33
LOC = BA21 ; # IO_L23P_T3_33
LOC = BA15 ; # IO_L21P_T3_DQS_31
LOC = BA14 ; # IO_L21N_T3_DQS_31
LOC = BB12 ; # IO_L24N_T3_31
LOC = AY14 ; # IO_L22P_T3_31
LOC = AW15 ; # IO_L19P_T3_31
LOC = BB14 ; # IO_L23P_T3_31
LOC = BB13 ; # IO_L23N_T3_31
LOC = AW12 ; # IO_L20P_T3_31
LOC = AY13 ; # IO_L22N_T3_31
LOC = AY12 ; # IO_L20N_T3_31
LOC = BA12 ; # IO_L24P_T3_31
LOC = AP12 ; # IO_L15P_T2_DQS_31
LOC = AR12 ; # IO_L15N_T2_DQS_31
LOC = AV15 ; # IO_L18P_T2_31
LOC = AU12 ; # IO_L17N_T2_31
LOC = AU13 ; # IO_L13N_T2_MRCC_31
LOC = AT12 ; # IO_L17P_T2_31
LOC = AU14 ; # IO_L13P_T2_MRCC_31
LOC = AV13 ; # IO_L14P_T2_SRCC_31
LOC = AW13 ; # IO_L14N_T2_SRCC_31
LOC = AT15 ; # IO_L16N_T2_31
LOC = AR15 ; # IO_L16P_T2_31
LOC = AK15 ; # IO_L3P_T0_DQS_31
LOC = AL14 ; # IO_L3N_T0_DQS_31
LOC = AK12 ; # IO_L6P_T0_31
LOC = AL15 ; # IO_L5N_T0_31
LOC = AJ15 ; # IO_L1N_T0_31
LOC = AK14 ; # IO_L2P_T0_31
LOC = AJ12 ; # IO_L4N_T0_31
LOC = AJ16 ; # IO_L1P_T0_31
LOC = AL16 ; # IO_L5P_T0_31
LOC = AJ13 ; # IO_L4P_T0_31
LOC = AK13 ; # IO_L2N_T0_31
LOC = AN15 ; # IO_L9P_T1_DQS_31
LOC = AN14 ; # IO_L9N_T1_DQS_31
LOC = AP13 ; # IO_L12P_T1_MRCC_31
LOC = AR14 ; # IO_L11P_T1_SRCC_31
LOC = AT14 ; # IO_L11N_T1_SRCC_31
LOC = AM12 ; # IO_L8P_T1_31
LOC = AP11 ; # IO_L10N_T1_31
LOC = AM13 ; # IO_L7P_T1_31
LOC = AN13 ; # IO_L7N_T1_31
LOC = AM11 ; # IO_L8N_T1_31
LOC = AN11 ; # IO_L10P_T1_31
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