Xilinx VC709 User Manual page 72

Appendix C: Master UCF Listing
72
NET FLASH_A[17]
NET FLASH_A[16]
NET FLASH_A[15]
NET FLASH_A[14]
NET FLASH_A[13]
NET FLASH_A[12]
NET FLASH_A[11]
NET FLASH_A[10]
NET FLASH_A[9]
NET FLASH_A[8]
NET FLASH_A[7]
NET FLASH_A[6]
NET FLASH_A[5]
NET FLASH_A[4]
NET FLASH_A[3]
NET FLASH_A[2]
NET FLASH_A[1]
NET FLASH_A[0]
##
## BPI Flash data
##
NET FLASH_D[0]
NET FLASH_D[1]
NET FLASH_D[2]
NET FLASH_D[3]
NET FLASH_D[4]
NET FLASH_D[5]
NET FLASH_D[6]
NET FLASH_D[7]
NET FLASH_D[8]
NET FLASH_D[9]
NET FLASH_D[10]
NET FLASH_D[11]
NET FLASH_D[12]
NET FLASH_D[13]
NET FLASH_D[14]
NET FLASH_D[15]
#############################################
##
## XADC I/O
## Bank 15 VCCO = 1.8V
## XADC Header J19
##
#############################################
NET XADC_VAUX0P_R LOC = AN38 ; # J19-3
NET XADC_VAUX0N_R LOC = AP38 ; # J19-6
NET XADC_VAUX8P_R LOC = AM41 ; # J19-8
NET XADC_VAUX8N_R LOC = AM42 ; # J19-7
NET XADC_GPIO_0 LOC = AR38 ; # J19-18
NET XADC_GPIO_1 LOC = AR39 ; # J19-17
NET XADC_GPIO_2 LOC = AN40 ; # J19-20
NET XADC_GPIO_3 LOC = AN41 ; # J19-19
#############################################
##
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LOC = AU41 ; # Bank 15 IO_L22P_T3_A17_15
LOC = AV41 ; # Bank 15 IO_L22N_T3_A16_15
LOC = AM32 ; # Bank 14 IO_L16N_T2_A15_D31_14
LOC = AM33 ; # Bank 14 IO_L17P_T2_A14_D30_14
LOC = AN33 ; # Bank 14 IO_L17N_T2_A13_D29_14
LOC = AL29 ; # Bank 14 IO_L18P_T2_A12_D28_14
LOC = AL30 ; # Bank 14 IO_L18N_T2_A11_D27_14
LOC = AH29 ; # Bank 14 IO_L19P_T3_A10_D26_14
LOC = AH30 ; # Bank 14 IO_L19N_T3_A09_D25_VREF14
LOC = AJ30 ; # Bank 14 IO_L20P_T3_A08_D24_14
LOC = AK30 ; # Bank 14 IO_L20N_T3_A07_D23_14
LOC = AG29 ; # Bank 14 IO_L21N_T3_DQS_A06_D22_14
LOC = AK28 ; # Bank 14 IO_L22P_T3_A05_D21_14
LOC = AK29 ; # Bank 14 IO_L22N_T3_A04_D20_14
LOC = AF30 ; # Bank 14 IO_L23P_T3_A03_D19_14
LOC = AG31 ; # Bank 14 IO_L23N_T3_A02_D18_14
LOC = AH28 ; # Bank 14 IO_L24P_T3_A01_D17_14
LOC = AJ28 ; # Bank 14 IO_L24N_T3_A00_D16_14
LOC = AM36 ; # Bank 14 IO_L1P_T0_D00_MOSI_14
LOC = AN36 ; # Bank 14 IO_L1N_T0_D01_DIN_14
LOC = AJ36 ; # Bank 14 IO_L2P_T0_D02_14
LOC = AJ37 ; # Bank 14 IO_L2N_T0_D03_14
LOC = AK37 ; # Bank 14 IO_L4P_T0_D04_14
LOC = AL37 ; # Bank 14 IO_L4N_T0_D05_14
LOC = AN35 ; # Bank 14 IO_L5P_T0_D06_14
LOC = AP35 ; # Bank 14 IO_L5N_T0_D07_14
LOC = AM37 ; # Bank 14 IO_L6N_T0_D08_VREF_14
LOC = AG33 ; # Bank 14 IO_L7P_T1_D09_14
LOC = AH33 ; # Bank 14 IO_L7N_T1_D10_14
LOC = AK35 ; # Bank 14 IO_L8P_T1_D11_14
LOC = AL35 ; # Bank 14 IO_L8N_T1_D12_14
LOC = AJ31 ; # Bank 14 IO_L9N_T1_DQS_D13_14
LOC = AH34 ; # Bank 14 IO_L10P_T1_D14_14
LOC = AJ35 ; # Bank 14 IO_L10N_T1_D15_14
VC709 Evaluation Board
UG887 (v1.0) February 4, 2013