Clock Generation; Jtag Chain Block Diagram - Xilinx Zynq UltraScale+ ZCU216 User Manual

J25
JTAG
2 mm 2X7
Header
TDO
U29
FT4232HL
UART
BRIDGE
TDO
U1
JTAG
IF
PS Config
Bank 503
TDO

Clock Generation

The ZCU216 board provides fixed and variable clock sources for the ZU49DR Zynq UltraScale+
RFSoC. The following table lists the source devices for each clock.
UG1390 (v1.1) July 10, 2020
ZCU216 Board User Guide
Figure 15: JTAG Chain Block Diagram
TDI
TDI
TDI
Chapter 3: Board Component Descriptions
U27
JTAG
TDI
A B
BUF
U25
JTAG
TDO
B A
BUF
Send Feedback
U42
N.C.
J28 (D)
FMCP HSPC
Connector
TDI TDO
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