Xilinx Zynq EK-U1-ZCU208-ES1-G Manuals

Manuals and User Guides for Xilinx Zynq EK-U1-ZCU208-ES1-G. We have 2 Xilinx Zynq EK-U1-ZCU208-ES1-G manuals available for free PDF download: User Manual

Xilinx Zynq EK-U1-ZCU208-ES1-G User Manual (98 pages)

Brand: Xilinx | Category: Motherboard | Size: 14.48 MB

Table of Contents
2
Revision History

4
- Overview
  5
- Block Diagram
  5
Chapter 1: Introduction

5
- Document Audience and Scope
  5
- Additional Resources
  5
- ZCU216 Evaluation Board Block Diagram
  6
- Board Features
  6
- Zynq Ultrascale+ Rfsoc ZU49DR Features and Resources
  9
- Board Specifications
  10
  - Dimensions
    10
  - Environmental
    10
  - Operating Voltage
    10
- Standard ESD Measures
  11
- Board Component Location
  11
Chapter 2: Board Setup and Configuration

11
- ZCU216 Component Locations
  13
- Board Component Descriptions
  14
- ZCU216 Board Component Locations
  14
- Default Jumper and Switch Settings
  16
  - Board Jumper Header and Switch Locations
    17
  - Jumpers
    17
  - Default Jumper Settings
    18
  - Default Switch Settings
    19
  - Switches
    19
  - Jtag
    20
  - Mode Switch SW2 Configuration Option Settings
    20
  - Qspi
    20
- Zynq Ultrascale+ Rfsoc XCZU49DR Configuration
  20
- Sd
  21
- Component Descriptions
  22
- Zynq Ultrascale+ Rfsoc XCZU49DR
  22
Chapter 3: Board Component Descriptions

22
- Overview
  22
  - Top-Level Block Diagram
    23
  - Zynq Ultrascale+ Rfsoc Top-Level Block Diagram
    23
  - Encryption Key Battery Backup Circuit
    24
  - I/O Voltage Rails
    25
  - PS DDR4 SODIMM Socket
    26
  - PL C0 I/F DDR4 Component Memory
    27
  - PL C1 I/F DDR4 Component Memory
    27
  - Psmio
    28
  - MIO Peripheral Mapping
    28
  - Quad-SPI Flash Memory (MIO 0–12)
    29
  - Gpio (Mio 13, 38)
    30
  - I2C Bus Topology Overview
    30
  - I2C0 (Mio 14-15), I2C1 (Mio 16-17)
    30
  - I2C0 (Mio 14-15)
    31
  - I2C0 and I2C1 Bus Connectivity Overview
    31
  - I2C0 Bus Topology
    32
  - I2C0 Port Expander TCA6416A U15 Connections
    32
  - I2C1 (Mio 16-17)
    33
  - I2C0 Multiplexer PCA9544A U17 Target Device Addresses
    33
  - I2C1 Bus Topology
    34
  - I2C1 TCA9548A U20 Target Device Addresses
    34
  - I2C1 TCA9548A U22 Target Device Addresses
    35
  - Uart0 (Mio 18-19)
    35
  - FT4232HL Port Assignments
    35
  - ZCU216 FT4232HL Connectivity
    36
  - Gpio (Mio 22-23)
    36
  - Pmu Gpi (Mio 26)
    36
  - Pmu Gpo (Mio 32-37)
    36
  - Sdio (Mio 39-51)
    37
  - SD Card Interface
    37
  - XCZU49DR to MSP430 Connections
    37
  - IP4856CX25 U23 Adapter Pinout
    38
  - USB 3.0 Transceiver and USB 2.0 ULPI PHY
    39
  - USB Interface
    40
  - GEM3 Ethernet (MIO 64-77)
    41
  - USB3320 ULPI USB 2.0 Transceiver Circuit
    41
  - Ethernet Block Diagram
    41
  - 10/100/1000 Mhz Tri-Speed Ethernet PHY
    42
  - Ethernet PHY Reset
    42
  - Ethernet PHY LED Interface
    42
  - Ethernet PHY LED Functional Description
    42
  - Programmable Logic JTAG Programming Options
    43
  - Clock Generation
    44
  - JTAG Chain Block Diagram
    44
  - ZCU216 Board Clock Sources
    45
  - Clock Connections to ZU49DR U1
    45
  - SI5341B 10 Independent Output Any-Frequency Clock Generator U43
    46
  - Inputs
    46
  - Programmable User SI570 Clocks
    47
  - Zsfp/Zsfp+ Module Connectors
    48
  - User SMA MGT Clock
    48
  - DDR4 Memory Interface C0 (U47) and C1 (U130) SI570
    48
  - Quad-Zsfp Connector Zsfp Locations
    49
  - Zsfp Control and Status Board Connections
    49
  - User PMOD GPIO Headers
    51
  - User I/O
    51
  - Power and Status Leds
    52
  - Multi-Gigabit Transceivers
    54
  - GTY Transceivers
    54
  - GPIO and Power Status LED Areas
    54
  - Fmcp Hspc
    55
  - Zsfp+
    55
  - ZCU216 ZU49DR GTY Mapping
    55
  - PS GTR Transceivers
    56
  - PS M.2 SATA Connector
    56
  - M.2 Connector
    57
  - M.2 Connector U40 Pinout
    57
  - ZCU216 M.2 U40 Connector Tie-Offs
    58
  - FPGA Mezzanine Card Interface
    59
  - M.2 U40 Connections to the XCZU49DR Zynq Ultrascale+ Rfsoc
    59
  - FMCP Connector J28
    59
  - Cooling Fan Connector
    60
  - VADJ_FMC Power Rail
    61
  - ZCU216 MSP430 System Controller
    61
  - ZCU216 Cooling Fan Circuit
    61
  - Power On/Off Slide Switch
    63
  - Program_B Pushbutton
    63
  - ZCU216 Power Input
    63
  - System Reset Pushbuttons
    64
  - PS_POR_B Reset
    64
  - Board Power System
    64
  - PS_SRST_B Reset
    64
  - ZCU216 Power System Devices
    65
  - Device Rail Maximum Current
    66
  - Monitoring Voltage and Current
    66
  - FMCP HSPC Connector Pinout
    68
Appendix A: VITA 57.4 FMCP Connector Pinout

68
- Overview
  68
Appendix B: Xilinx Design Constraints

69
- Overview
  69
Appendix C: XM650/XM655 Balun Add-On Cards for Rfsoc EVM

70
- Overview
  70
  - XM655: 16T16R Breakout Add-On Card
    71
  - XM650: 16T16R N79 Band Loopback Demo Add-On Card
    71
- Block Diagram
  71
- Connector
  72
- XM650/655 Connector Pinout
  73
- Corehc2 Connector Pinout (XM655 Only)
  77
- ADC 16 Lanes
  77
- Features
  78
  - DAC 16 Lanes
    78
  - Board Dimensions/Form Factor
    79
  - XM655 Dimensions
    79
- Board Specifications
  79
  - XM655 Board Dimensions
    80
  - XM650 Board Dimensions
    81
- Functional Description
  82
  - Mounting Holes/Keepouts
    82
  - Mounting Screws and Standoff Details
    82
  - Cables/Smas
    82
  - TM40-0157-00 Landing Pad
    83
  - TMB-V5F2-1L1 SMA Drawing
    84
  - SMA to SMA Cable: Carlisle TM40-0159-00 6"
    84
  - Balun/Filter
    85
  - Low Frequency Baluns
    85
  - Low Frequency Balun Part Number
    85
  - Low Frequency Balun Specifications
    85
  - Low Frequency Balun Drawing
    86
  - Outline Dimensions (MM)
    86
  - Medium Frequency Baluns
    86
  - Medium Frequency Balun Part Number
    86
  - Medium Frequency Balun Specifications
    87
  - Medium Frequency Balun Drawing
    87
  - High Frequency Baluns
    87
  - High Frequency Balun (4-5 Ghz) Part Number
    87
  - High Frequency Balun Specifications
    88
  - High Frequency Balun Drawing
    88
  - High Frequency Balun (5-6 Ghz) Part Number
    88
  - RF Cages
    89
  - N79 Band Balun/Filter
    90
  - Band Pass Filter
    90
  - N79 Balun
    90
  - Header
    90
  - High ADCIO and DACIO Digital I/O Header Pins
    91
Appendix D: Regulatory and Compliance Information

92
- Compliance Markings
  93
- Xilinx Resources
  94
Appendix E: Additional Resources and Legal Notices

94

Xilinx Zynq EK-U1-ZCU208-ES1-G User Manual (92 pages)

Brand: Xilinx | Category: Motherboard | Size: 4.36 MB

Revision History

2
- Table of Contents
  3
Chapter 1: Introduction

5
- Overview
  5
- Document Audience and Scope
  5
- Additional Resources
  5
- Block Diagram
  6
- Board Features
  6
- Board Specifications
  10
Chapter 2: Board Setup and Configuration

11
Chapter 3: Board Component Descriptions

21
- Overview
  21
- Component Descriptions
  21
Appendix A: VITA57.4 FMCP Connector Pinout

65
Appendix B: Xilinx Design Constraints

66
- Overview
  66
Appendix C: HW-XM650/655 Balun Daughter Cards for Gen 3 Rfsoc EVM

67
- Overview
  67
- Block Diagram
  68
- Connector
  69
- XM650/655 Connector Pinout
  70
- Corehc2 Connector Pin out (XM655 Only)
  74
- Features
  75
- Board Specifications
  76
- Functional Description
  80
Appendix D: Additional Resources and Legal Notices

90
- Xilinx Resources
  90
- Documentation Navigator and Design Hubs
  90
- References
  90
- Please Read: Important Legal Notices
  92

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Motherboard Computer Hardware Transceiver Microcontrollers Controller

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Xilinx Zynq EK-U1-ZCU208-ES1-G Manuals

Xilinx Zynq EK-U1-ZCU208-ES1-G User Manual (98 pages)

Table of Contents

Revision History

Chapter 1: Introduction

Chapter 2: Board Setup and Configuration

Chapter 3: Board Component Descriptions

Appendix A: VITA 57.4 FMCP Connector Pinout

Appendix B: Xilinx Design Constraints

Appendix C: XM650/XM655 Balun Add-On Cards for Rfsoc EVM

Appendix D: Regulatory and Compliance Information

Appendix E: Additional Resources and Legal Notices

Xilinx Zynq EK-U1-ZCU208-ES1-G User Manual (92 pages)

Table of Contents

Revision History

Chapter 1: Introduction

Chapter 2: Board Setup and Configuration

Chapter 3: Board Component Descriptions

Appendix A: VITA57.4 FMCP Connector Pinout

Appendix B: Xilinx Design Constraints

Appendix C: HW-XM650/655 Balun Daughter Cards for Gen 3 Rfsoc EVM

Appendix D: Additional Resources and Legal Notices

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