Xilinx VC709 User Manual page 79

VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_A3]
set_property PACKAGE_PIN AP20 [get_ports DDR3_B_A2]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_A2]
set_property PACKAGE_PIN AR19 [get_ports DDR3_B_A1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_A1]
set_property PACKAGE_PIN AN19 [get_ports DDR3_B_A0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_A0]
set_property PACKAGE_PIN AN18 [get_ports DDR3_B_BA2]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_BA2]
set_property PACKAGE_PIN AR18 [get_ports DDR3_B_BA1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_BA1]
set_property PACKAGE_PIN AR17 [get_ports DDR3_B_BA0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_BA0]
set_property PACKAGE_PIN AU18 [get_ports DDR3_B_CLK1_P]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_CLK1_P]
set_property PACKAGE_PIN AV18 [get_ports DDR3_B_CLK1_N]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_CLK1_N]
set_property PACKAGE_PIN AT17 [get_ports DDR3_B_CLK0_P]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_CLK0_P]
set_property PACKAGE_PIN AU17 [get_ports DDR3_B_CLK0_N]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_CLK0_N]
set_property PACKAGE_PIN AY18 [get_ports SYSCLK_233_P]
set_property IOSTANDARD DIFF_SSTL15 [get_ports SYSCLK_233_P]
set_property PACKAGE_PIN AY17 [get_ports SYSCLK_233_N]
set_property IOSTANDARD DIFF_SSTL15 [get_ports SYSCLK_233_N]
set_property PACKAGE_PIN AW18 [get_ports DDR3_B_CKE1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_CKE1]
set_property PACKAGE_PIN AW17 [get_ports DDR3_B_CKE0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_CKE0]
set_property PACKAGE_PIN AU19 [get_ports DDR3_B_WE_B]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_WE_B]
set_property PACKAGE_PIN AV19 [get_ports DDR3_B_RAS_B]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_RAS_B]
set_property PACKAGE_PIN AT20 [get_ports DDR3_B_CAS_B]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_CAS_B]
set_property PACKAGE_PIN AT19 [get_ports DDR3_B_S1_B]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_S1_B]
set_property PACKAGE_PIN AV16 [get_ports DDR3_B_S0_B]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_S0_B]
set_property PACKAGE_PIN AW16 [get_ports DDR3_B_ODT1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_ODT1]
set_property PACKAGE_PIN AT16 [get_ports DDR3_B_ODT0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_ODT0]
set_property PACKAGE_PIN AU16 [get_ports DDR3_B_TEMP_EVENT_B]
set_property IOSTANDARD LVCMOS15 [get_ports DDR3_B_TEMP_EVENT_B]
set_property PACKAGE_PIN BB19 [get_ports DDR3_B_RESET_B]
set_property IOSTANDARD LVCMOS15 [get_ports DDR3_B_RESET_B]
set_property PACKAGE_PIN AJ23 [get_ports DDR3_B_D9]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D9]
set_property PACKAGE_PIN AK23 [get_ports DDR3_B_D8]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D8]
set_property PACKAGE_PIN AK20 [get_ports DDR3_B_D14]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D14]
set_property PACKAGE_PIN AL20 [get_ports DDR3_B_D15]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D15]
set_property PACKAGE_PIN AJ22 [get_ports DDR3_B_DQS1_P]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_DQS1_P]
set_property PACKAGE_PIN AK22 [get_ports DDR3_B_DQS1_N]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_DQS1_N]
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VC709 Board XDC Listing
79