Xilinx VC709 User Manual page 77

VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA12_N]
set_property PACKAGE_PIN N39 [get_ports FMC1_HPC_LA14_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA14_P]
set_property PACKAGE_PIN N40 [get_ports FMC1_HPC_LA14_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_HPC_LA14_N]
set_property PACKAGE_PIN AJ16 [get_ports DDR3_B_D52]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D52]
set_property PACKAGE_PIN AJ15 [get_ports DDR3_B_D49]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D49]
set_property PACKAGE_PIN AK14 [get_ports DDR3_B_D50]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D50]
set_property PACKAGE_PIN AK13 [get_ports DDR3_B_D55]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D55]
set_property PACKAGE_PIN AK15 [get_ports DDR3_B_DQS6_P]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_DQS6_P]
set_property PACKAGE_PIN AL14 [get_ports DDR3_B_DQS6_N]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_DQS6_N]
set_property PACKAGE_PIN AJ13 [get_ports DDR3_B_D54]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D54]
set_property PACKAGE_PIN AJ12 [get_ports DDR3_B_D51]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D51]
set_property PACKAGE_PIN AL16 [get_ports DDR3_B_D53]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D53]
set_property PACKAGE_PIN AL15 [get_ports DDR3_B_D48]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D48]
set_property PACKAGE_PIN AK12 [get_ports DDR3_B_DM6]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_DM6]
set_property PACKAGE_PIN AM13 [get_ports DDR3_B_D60]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D60]
set_property PACKAGE_PIN AN13 [get_ports DDR3_B_D61]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D61]
set_property PACKAGE_PIN AM12 [get_ports DDR3_B_D58]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D58]
set_property PACKAGE_PIN AM11 [get_ports DDR3_B_D62]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D62]
set_property PACKAGE_PIN AN15 [get_ports DDR3_B_DQS7_P]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_DQS7_P]
set_property PACKAGE_PIN AN14 [get_ports DDR3_B_DQS7_N]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_DQS7_N]
set_property PACKAGE_PIN AN11 [get_ports DDR3_B_D63]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D63]
set_property PACKAGE_PIN AP11 [get_ports DDR3_B_D59]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D59]
set_property PACKAGE_PIN AR14 [get_ports DDR3_B_D56]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D56]
set_property PACKAGE_PIN AT14 [get_ports DDR3_B_D57]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D57]
set_property PACKAGE_PIN AP13 [get_ports DDR3_B_DM7]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_DM7]
set_property PACKAGE_PIN AU14 [get_ports DDR3_B_D43]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D43]
set_property PACKAGE_PIN AU13 [get_ports DDR3_B_D41]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D41]
set_property PACKAGE_PIN AV13 [get_ports DDR3_B_D44]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D44]
set_property PACKAGE_PIN AW13 [get_ports DDR3_B_D45]
set_property IOSTANDARD SSTL15 [get_ports DDR3_B_D45]
set_property PACKAGE_PIN AP12 [get_ports DDR3_B_DQS5_P]
set_property IOSTANDARD DIFF_SSTL15 [get_ports DDR3_B_DQS5_P]
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VC709 Board XDC Listing
77