Hardware Test Setup Requirements - Xilinx Kintex-7 FPGA KC705 Getting Started Manual

Basic Hardware Bring-up Using the BIST
The built-in self-test (BIST) tests many of the features offered by the Kintex-7 FPGA KC705
evaluation kit. The test is stored in the nonvolatile BPI Linear Flash memory, and
configures the FPGA when the mode and upper flash address pins on the board are set for
Master BPI.
Figure 1
X-Ref Target - Figure 1
USB-UART
(J6)
USB-JTAG
(U59)
Ethernet
(U37)
Note:
Kintex-7 FPGA User Guide (UG810).

Hardware Test Setup Requirements

The prerequisites for testing the design in hardware are:
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•
•
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KC705 Getting Started Guide
UG883 (v4.0.1) May 28, 2014
provides an overview of the board features used by the BIST.
BPI Flash (U58)
Mode Switches
Rotary Switch (SW8)
(SW13)
Switch is underneath LCD screen
Figure 1: KC705 Board Features Used by the BIST
For a diagram of all the features on the KC705, see KC705 Evaluation Board for the
KC705 Evaluation board with the Kintex-7 FPGA XC7K325T-2FFG900CES device
USB-to-Mini-B cable (for UART)
AC power adapter (12 VDC)
Terminal program [Ref 3]
Note:
The Tera Term Pro program is used for illustrative purposes. Other programs can be
used.
USB-UART drivers from SiLabs
www.xilinx.com
Basic Hardware Bring-up Using the BIST
User DIP (SW11)
DDR3
[Ref 4]
User LEDs
Power Switch
(SW15)
Power (J49)
Prog
CPU Reset
User Push Buttons
UG883_01_040913
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