NEC UPD703116 User Manual page 372

(b) When the trigger signal of TM20 = 0 is output immediately after the SWFEn bit is cleared to 0
When the trigger signal of TM20 = 0 is output immediately after the SWFEn bit is cleared to 0, from when
the SWFEn bit is cleared to 0 to when the trigger signal of TM20 = 0 is output is the first active period, so
a pulse shorter than the active period of the ordinary TO2n output is output.
In addition, since TO2n output is forcibly fixed to the inactive level when the SWFEn bit is set to 1, the
active level output period also becomes shorter if the SWFEn bit is set to 1 while an active level is being
output (refer to Figure 9-87).
Figure 9-87. When Output Operation Is Started/Ended Normally
(When OCTLE0 Register's OTMEn1, OTMEn0 Bits = 01, ODELD0 Register's ODLEn2 to ODLEn0 Bits = 000)
f
CLK
TM20 02 03 04
CVSE00 register
CVSEn0 register
TM20 = 0
CVSEn0 register
match signal
SWFEn bit
Inactive state
(fixed)
TO2n (internal)
TO2n output
(ALVEn bit = 0)
TO2n output
(ALVEn bit = 1)
Remark n = 1 to 4
372
CHAPTER 9 TIMER/COUNTER FUNCTION
05 06 07 00 01 02 03
Active state Inactive state
User's Manual U14492EJ5V0UD
04 05 06 07 00 01 02
0008H
0005H
Active state Inactive state
03 04 05 06 07 00
Inactive state
(fixed)
Active state