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7.2.3 Non-maskable interrupt status flag (NP)
The NP flag is a status flag that indicates that non-maskable interrupt (NMI) servicing is under execution.
This flag is set when an NMI interrupt has been acknowledged, and masks all interrupt requests and exceptions to
prohibit multiple interrupts from being acknowledged.
31
PSW
0
0
0
0
Bit position
7
NP
7.2.4 Edge detection function
(1) External interrupt mode register 0 (INTM0)
External interrupt mode register 0 (INTM0) is a register that specifies the valid edge of a non-maskable
interrupt (NMI). The NMI valid edge can be specified to be either the rising edge or the falling edge by the
ESN0 bit.
This register can be read/written in 8-bit or 1-bit units.
7
6
INTM0
0
0
Bit position
0
ESN0
164
CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
0
0
0
0
0
0
0
0
0
0
0
Bit name
Indicates whether NMI interrupt servicing is in progress.
0: No NMI interrupt servicing
1: NMI interrupt currently being serviced
5
4
0
0
Bit name
Specifies the NMI pin's valid edge.
0: Falling edge
1: Rising edge
User's Manual U14492EJ5V0UD
8
7
6
5
0
0
0
0
0
0
0
0
0
NP
EP
ID
Function
3
2
1
<0>
0
0
0
ESN0
Function
4
3
2
1
0
Initial value
SAT
CY
OV
S Z
00000020H
Address
Initial value
FFFFF880H
00H
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