NEC UPD703116 User Manual page 301

(3) Timer control registers 10, 11 (TMC10, TMC11)
The TMC1n register is used to enable/disable TM1n operation and to set transfer and timer clear operations.
TMC1n can be read/written in 8-bit or 1-bit units.
Caution Changing the value of bits of the TMC1n register other than the TM1CEn bit during TM1n
operation (TM1CEn bit = 1) is prohibited.
7 <6>
TMC10 0 TM1CE0
7 <6>
TMC11 0 TM1CE1
Bit position Bit name
6 TM1CEn
3 RLEN
2 ENMD
Remark n = 0, 1
CHAPTER 9 TIMER/COUNTER FUNCTION
5 4 3
0 0 RLEN ENMD
5 4 3
0 0 RLEN ENMD
Enables/disables TM1n operation.
0: Disable TM1n count operation
1: Enable TM1n count operation
Enables/disables transfer from CM1n0 to TM1n.
0: Disable transfer
1: Enable transfer
Cautions 1. When RLEN = 1, the value set to CM1n0 is transferred to TM1n
upon occurrence of TM1n underflow.
2. The RLEN bit is valid only in UDC mode A (CMD bit of TUMn
register = 1 and MSEL bit = 0). In the general-purpose timer mode
(CMD bit = 0) and UDC mode B (CMD bit = 1, MSEL bit = 1), a
transfer operation is not executed even if the RLEN bit is set to 1.
Enables/disables clearing of TM1n in general-purpose timer mode (CMD bit of TUMn
register = 0).
0: Disable clear (free-running mode)
Clearing is not performed even when TM1n and CM1n0 values match.
1: Enable clear
Clearing is performed when TM1n and CM1n0 values match.
Caution The ENMD bit setting becomes invalid in UDC mode (CMD bit of
TUMn register = 1).
User's Manual U14492EJ5V0UD
2 1 0
CLR1 CLR0 FFFFF5ECH
2 1 0
CLR1 CLR0 FFFFF60CH
Function
(1/2)
Address Initial value
00H
Address Initial value
00H
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