Configuration Of Clock Output Controller; Registers Controlling Clock Output Controller - NEC 78K0/KD1 Series User Manual

11.2 Configuration of Clock Output Controller

The clock output controller consists of the following hardware.
Control registers
Note See Figure 4-18 Block Diagram of P140.

11.3 Registers Controlling Clock Output Controller

The following two registers are used to control the clock output controller.
• Clock output selection register (CKS)
• Port mode register 14 (PM14)
(1) Clock output selection register (CKS)
This register sets output enable/disable for clock output (PCL) and sets the output clock.
CKS is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CKS to 00H.
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CHAPTER 11 CLOCK OUTPUT CONTROLLER
Table 11-1. Clock Output Controller Configuration
Item
Clock output selection register (CKS)
Port mode register 14 (PM14)
Preliminary User's Manual U16315EJ1V0UD
Configuration
Note