Ppg Output Operations - NEC 78K0/KD1 Series User Manual

6.4.2 PPG output operations

Setting 16-bit timer mode control register 00 (TMC00) and capture/compare control register 00 (CRC00) as shown
in Figure 6-10 allows operation as PPG (Programmable Pulse Generator) output.
In the PPG output operation, rectangular waves are output from the TO00 pin with the pulse width and the cycle
that correspond to the count values preset in 16-bit timer capture/compare register 010 (CR010) and in 16-bit timer
capture/compare register 000 (CR000), respectively.
Figure 6-10. Control Register Settings for PPG Output Operation
TMC00 0 0
CRC00 0 0
OSPT00 OSPE00
TOC00 0 0
Cautions 1. Values in the following range should be set in CR000 and CR010:
0000H < CR010 < CR000 ≤ ≤ ≤ ≤ FFFFH
2. The cycle of the pulse generated through PPG output (CR000 setting value + 1) has a duty of
(CR010 setting value + 1)/(CR000 setting value + 1).
Remark ×: Don't care
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
(a) 16-bit timer mode control register 00 (TMC00)
TMC003 TMC002 TMC001
0 0 1 1 0
(b) Capture/compare control register 00 (CRC00)
CRC002 CRC001
×
0 0 0 0
(c) 16-bit timer output control register 00 (TOC00)
TOC004 LVS00 LVR00 TOC001
0 1 0/1 0/1 1
Preliminary User's Manual U16315EJ1V0UD
OVF00
0
Clears and starts on match between TM00 and CR000.
CRC000
0
CR000 used as compare register
CR010 used as compare register
TOE00
1
Enables TO00 output
Inverts output on match between TM00 and CR000
Specifies initial value of TO00 output F/F
Inverts output on match between TM00 and CR010
Disables one-shot pulse output
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