Cautions For 16-Bit Timer/Event Counter 00 - NEC 78K0/KD1 Series User Manual

6.5 Cautions for 16-Bit Timer/Event Counter 00

(1) Timer start errors
An error of up to one clock may occur in the time required for a match signal to be generated after timer start.
This is because 16-bit timer counter 00 (TM00) is started asynchronously to the count clock.
Count clock
TM00 count value
(2) 16-bit timer capture/compare register setting (in the mode in which clear & start occurs on match
between TM00 and CR000)
Set 16-bit timer capture/compare registers 000, 010 (CR000, CR010) to other than 0000H. This means a 1-pulse
count operation cannot be performed when 16-bit timer/event counter 00 is used as an event counter.
(3) Operation after compare register change during timer count operation
If the value after 16-bit timer capture/compare register 000 (CR000) is changed is smaller than that of 16-bit timer
counter 00 (TM00), TM00 continues counting, overflows and then restarts counting from 0. Thus, if the value (M)
after CR000 changes is smaller than that (N) before the change, it is necessary to restart the timer after changing
CR000.
Figure 6-33. Timings After Change of Compare Register During Timer Count Operation
Count clock
CR000
TM00 count value
Remark N > X > M
158
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Figure 6-32. Start Timing of 16-Bit Timer Counter 00 (TM00)
0000H
Timer start
N
X − 1
X
Preliminary User's Manual U16315EJ1V0UD
0001H 0002H 0003H
M
FFFFH 0000H
0004H
0001H 0002H