Watch Timer Operations; Watch Timer Operation - NEC 78K0/KD1 Series User Manual

9.4 Watch Timer Operations

9.4.1 Watch timer operation

The watch timer generates an interrupt request (INTWT) at a specific time interval by using the X1 input clock or
subsystem clock.
When bit 0 (WTM0) and bit 1 (WTM1) of the watch timer operation mode register (WTM) are set to 1, the count
operation starts. When these bits are set to 0, the 5-bit counter is cleared and the count operation stops.
When the interval timer is simultaneously operated, zero-second start can be achieved only for the watch timer by
setting WTM1 to 0. In this case, however, the 11-bit prescaler is not cleared. Therefore, an error up to 2
seconds occurs in the first overflow (INTWT) after zero-second start.
The interrupt request is generated at the following time intervals.
WTM3 WTM2 Interrupt Time Selection
14
0 0 2
13
0 1 2
5
1 0 2
4
1 1 2
Remark f : X1 input clock oscillation frequency
X
f : Subsystem clock oscillation frequency
XT
f : Watch timer clock frequency
W
206
CHAPTER 9 WATCH TIMER
Table 9-4. Watch Timer Interrupt Time
When Operated at f
/f 0.5 s
W
/f 0.25 s
W
977 µ s
/f
W
488 µ s
/f
W
Preliminary User's Manual U16315EJ1V0UD
= 32.768 kHz When Operated at f
XT
(WTM7 = 1)
0.210 s
0.105 s
410 µ s
205 µ s
× 1/f
11
W
= 10 MHz
X
(WTM7 = 0)