NEC UPD703116 User Manual page 819

Edition
2nd Modification of description on bits that can be manipulated in 10.3.7 (2) (c) Prescaler
edition compare registers 1, 2 (PRSCM1, PRSCM2)
Addition of 10.3.7 (3) Allowable baud rate range during reception
Addition of 10.3.7 (4) Transfer rate in 2-frame continuous reception
Modification of bit names in 10.4.3 (1) Clocked serial interface mode registers 0, 1
(CSIM0, CSIM1)
Modification of description on bits that can be manipulated in 10.4.3 (4) Clocked serial
interface reception buffer registers L0, L1 (SIRBL0, SIRBL1)
Modification of description on bits that can be manipulated in 10.4.3 (6) Clocked serial
interface read-only reception buffer registers L0, L1 (SIRBEL0, SIRBEL1)
Modification of description on bits that can be manipulated in 10.4.3 (8) Clocked serial
interface transmission buffer registers L0, L1 (SOTBL0, SOTBL1)
Modification of description on bits that can be manipulated in 10.4.3 (10) Clocked serial
interface initial transmission buffer registers L0, L1 (SOTBFL0, SOTBFL1)
Modification of description on bits that can be manipulated in 10.4.3 (12) Serial I/O shift
registers L0, L1 (SIOL0, SIOL1)
Modification of description on bits that can be manipulated in 10.4.6 (2) (c) Prescaler
compare register 3 (PRSCM3)
Modification of Figure 11-1 Block Diagram of FCAN
Addition of description in 11.5 Message Processing
Modification of description in Table 11-6 Data Length Code Settings
Modification of description in 11.8.7 (1) Prescaler
Modification of description in 11.8.7 (2) Nominal bit time (8 to 25 time quantum)
Addition of Caution and modification of bit description in 11.10 (2) CAN message data
length registers 00 to 31 (M_DLC00 to M_DLC31)
Deletion of one of Notes for bits, addition of Caution and modification of bit description in
11.10 (3) CAN message control registers 00 to 31 (M_CTRL00 to M_CTRL31)
Addition of Caution in bit description in 11.10 (4) CAN message time stamp registers 00
to 31 (M_TIME00 to M_TIME31)
Modification of description in 11.10 (6) CAN message ID registers L00 to L31 and H00
to H31 (M_IDL00 to M_IDL31 and M_IDH00 to M_IDH31)
Deletion of part of bit description in 11.10 (7) CAN message configuration registers 00
to 31 (M_CONF00 to M_CONF31)
Addition of bit description in 11.10 (8) CAN message status registers 00 to 31
(M_STAT00 to M_STAT31)
Modification of description on bits that can be manipulated, modification of Caution in bit
description, and addition of Note in 11.10 (14) CAN global status register (CGST)
Modification of description on bits that can be manipulated in 11.10 (15) CAN global
interrupt enable register (CGIE)
Modification of Figure 11-25 FCAN Clocks
Modification of bit description in 11.10 (18) CAN message search start/result register
(CGMSS (during write)/CGMSR (during read))
APPENDIX D REVISION HISTORY
Major Revision from Previous Edition
User's Manual U14492EJ5V0UD
(6/13)
Applied to:
CHAPTER 10
SERIAL
INTERFACE
FUNCTION
CHAPTER 11
FCAN
CONTROLLER
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