NEC UPD703116 User Manual page 275

32-bit single-chip microcontrollers
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Figure 9-30. Operation Timing in PWM Mode 2 (Sawtooth Wave)
count value
Interrupt request
Positive phase
(TO0n0, TO0n2, TO0n4)
Negative phase
(TO0n1, TO0n3, TO0n5)
Remarks 1. The above figure shows the timing chart when BFTE3 and BFTEN of the TMC0n register are 1,
and transfer from BFCMn3 to CM0n3, or from BFCMnx to CM0nx is enabled. Transfer is not
performed when BFTE3 = 0 or BFTEN = 0.
2. n = 0, 1
3. x = 0 to 2
4. t: Dead time = (DTRRn + 1)/f
5. The above figure shows an active high case.
Figure 9-31 shows the overall operation image.
CHAPTER 9 TIMER/COUNTER FUNCTION
TM0n
a
0000H
CM0nx
match
BFCMnx
a
CM0nx
BFCMn3
d
CM0n3
F/F
Set by rising edge of
TM0CEn bit
DTMnx
t
t
(f
: Base clock)
CLK
CLK
User's Manual U14492EJ5V0UD
CM0n3 (d)
CM0n3 (e)
b
CM0nx
match
b
c
b
e
f
e
INTCM0n3
t
t
c
f
INTCM0n3
t
275

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