NEC UPD703116 User Manual page 566

(a) Read (2/2)
Bit position Bit name
2 TSM
0 GOM
Notes 1. Register with a name starting with "C1"
2. The CGCS register can be accessed.
Write accessing the CGMSS register is prohibited. If the CGMSS register is write accessed, the
wrong search result is reflected in the CGMSR register.
3. Write-accessing the CGCS register is prohibited. Write-accessing the CGMSS register is possible.
566
CHAPTER 11 FCAN CONTROLLER
Indicates the operation status of the time stamp counter
0: Time stamp counter is stopped
1: Time stamp counter is operating
Note See 11.10 (17) CAN time stamp count register (CGTSC)
Indicates the status of the global operation mode.
0: Access to CAN module register
1: Access to CAN module register
Cautions 1. The GOM bit controls the method the memory is accessed by the MAC
and CAN module operation state.
• When GOM bit = 0
• All the CAN modules are reset.
• Access to the CAN module register is prohibited (if accessed, a
MAC error interrupt occurs)
• Read/write access to the temporary buffer is enabled.
• Access to the message buffer area is enabled.
• When GOM bit = 1
• Access to the CAN module register is enabled
• Access to the temporary buffer is prohibited (if access is attempted,
a MAC error interrupt occurs).
• Access to the message buffer area is enabled.
2. The GOM bit is cleared to 0 only when all the CAN modules are in the
initial status (when the ISTAT bit of the C1CTRL register = 1). If one of
the CAN modules is not in the initial status, the GOM bit remains set (1)
even if it is cleared to 0.
3. To clear (0) the GOM bit, first set (1) the INIT bit of the C1CTRL register,
and then set (1) the EFSD bit. Do not manipulate the GOM bit and EFSD
bit simultaneously.
User's Manual U14492EJ5V0UD
Function
Note
.
Note 1
is prohibited
Note 1
is enabled
Note 2
.
(2/3)
Note 3
.