NEC UPD703116 User Manual page 331

Signal Name
Note 1
CASC
CNT
CT
CTC
ECLR
ED1, ED2
Note 2
R
RA
RB
RELOAD2A
RELOAD2B
RN
S/T
TCOUNTE0, TCOUNTE1
TINEm
Notes 1. TM21 performs count operation when CASC (CNT = MAX. for TM20) is generated and the rising
edge of CTC is detected in the 32-bit mode.
2. TM20/TM21 clear by sub-channel 0/5 compare match or count direction can be controlled.
Remark m = 0 to 5
n = 0, 1
x = 1 to 4
CHAPTER 9 TIMER/COUNTER FUNCTION
Table 9-11. Meaning of Signals in Block Diagram
TM21 count signal input in 32-bit mode
Count value of timer 2 (CNT = MAX.: Maximum value count signal output of timer 2 (generated
when TM2n = FFFFH), CNT = 0: Zero count signal output of timer 2 (generated when TM2n =
0000H))
TM2n count signal input in 16-bit mode
TM21 count signal input in 32-bit mode
External control signal input from TCLR2 input
Capture event signal input from edge selector
Compare match signal input (sub-channel 0/5)
TM20 zero count signal input (reset signal of output circuit)
TM21 zero count signal input (reset signal of output circuit)
TM20 zero count signal input (generated when TM20 = 0000H)
TM21 zero count signal input (generated when TM21 = 0000H)
Sub-channel x interrupt signal input (reset signal of output circuit)
Sub-channel x interrupt signal input (set signal of output circuit)
Timer 2 count enable signal input
Timer 2 sub-channel m capture event signal input
User's Manual U14492EJ5V0UD
Meaning
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