Hitachi SH7750 Hardware Manual page 49

Table 17.6 Examples of SCBRR1 Settings for Bit Rate B (bits/s) (When n = 0) ................ 716
Table 17.7 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)........ 716
Table 17.8 Register Settings and SCK Pin State.................................................................. 717
Table 17.9 Smart Card Mode Operating States and Interrupt Sources ................................ 724
Table 18.1 20-Bit General-Purpose I/O Port Pins................................................................ 739
Table 18.2 SCI I/O Port Pins ............................................................................................... 740
Table 18.3 SCIF I/O Port Pins ............................................................................................. 740
Table 18.4 I/O Port Registers............................................................................................... 741
Table 19.1 INTC Pins .......................................................................................................... 753
Table 19.2 INTC Registers .................................................................................................. 753
IRL3-IRL0 Pins and Interrupt Levels ............................................................... 756
Table 19.3
SH7750 IRL3-IRL0 Pins and Interrupt Levels (When IRLM = 1) ................... 757
Table 19.4
Table 19.5 Interrupt Exception Handling Sources and Priority Order................................. 759
Table 19.6 Interrupt Request Sources and IPRA-IPRD Registers....................................... 762
Table 19.7 Interrupt Request Sources and the Bits of the INTPRI00 Register .................... 765
Table 19.8 Bit Assignments................................................................................................. 767
Table 19.9 Interrupt Response Time.................................................................................... 771
Table 20.1 UBC Registers ................................................................................................... 775
Table 21.1 H-UDI Pins ........................................................................................................ 801
Table 21.2 H-UDI Registers ................................................................................................ 802
Table 21.3 Configuration of the Boundary Scan Register (1).............................................. 807
Table 21.3 Configuration of the Boundary Scan Register (2).............................................. 808
Table 21.3 Configuration of the Boundary Scan Register (3).............................................. 809
Table 22.1 Absolute Maximum Ratings .............................................................................. 813
Table 22.2 DC Characteristics (HD6417750RBP240) ........................................................ 814
Table 22.3 DC Characteristics (HD6417750RF240) ........................................................... 816
Table 22.4 DC Characteristics (HD6417750RBP200) ........................................................ 818
Table 22.5 DC Characteristics (HD6417750RF200) ........................................................... 820
Table 22.6 DC Characteristics (HD6417750SBP200)......................................................... 822
Table 22.7 DC Characteristics (HD6417750SF200) ........................................................... 824
Table 22.8 DC Characteristics (HD6417750BP200M)........................................................ 826
Table 22.9 DC Characteristics (HD6417750SF167) ........................................................... 828
Table 22.10 DC Characteristics (HD6417750SF167I) .......................................................... 830
Table 22.11 DC Characteristics (HD6417750F167).............................................................. 832
Table 22.12 DC Characteristics (HD6417750F167I) ............................................................ 834
Table 22.13 DC Characteristics (HD6417750SVF133)......................................................... 836
Table 22.14 DC Characteristics (HD6417750SVBT133)...................................................... 838
Table 22.15 DC Characteristics (HD6417750VF128)........................................................... 840
Table 22.16 Permissible Output Currents .............................................................................. 841
Table 22.17 Clock Timing (HD6417750RBP240) ................................................................ 842
Table 22.18 Clock Timing (HD6417750RF240) ................................................................... 842
Table 22.19 Clock Timing (HD6417750BP200M, HD6417750SBP200,
HD6417750RBP200)......................................................................................... 842
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