Hitachi SH7750 Hardware Manual page 374

Table 13.5 PCMCIA Support Interfaces (cont)
IC Memory Card Interface
Signal
Pin Name I/O Function
29 A0 I
30 D0 I/O Data
31 D1 I/O Data
32 D2 I/O Data
WP *
33 O
34 GND
35 GND
CD1
36 O
37 D11 I/O Data
38 D12 I/O Data
39 D13 I/O Data
40 D14 I/O Data
41 D15 I/O Data
CE2
42 I
43 RFSH I
44 RFU
45 RFU
46 A17 I
47 A18 I
48 A19 I
49 A20 I
50 A21 I
51 VCC
52 VPP2
53 A22 I
54 A23 I
55 A24 I
56 A25 I
Rev. 6.0, 07/02, page 324 of 986
Signal
Name
Address A0
D0
D1
D2
IOIS16
Write protect
Ground GND
Ground GND
CD1
Card detection
D11
D12
D13
D14
D15
CE2
Card enable
Refresh request RFSH
IORD
Reserved
IOWR
Reserved
Address
Address
Address
Address
Address
Power supply VCC
Programming VPP2
power supply
Address
Address
Address
Address
I/O Card Interface
I/O Function
I Address
I/O Data
I/O Data
I/O Data
O 16-bit I/O port
Ground
Ground
O Card detection
I/O Data
I/O Data
I/O Data
I/O Data
I/O Data
I Card enable
I Refresh request
I I/O read
I I/O write
A17 I Address
A18 I Address
A19 I Address
A20 I Address
A21 I Address
Power supply
Programming/
peripheral power
supply
A22 I Address
A23 I Address
A24 I Address
A25 I Address
Corresponding
SH7750 Series
Pin
A0
D0
D1
D2
IOIS16
—
—
Sensed on port
D11
D12
D13
D14
D15
CE2A or CE2B
Output from
port
ICIORD
ICIOWR
A17
A18
A19
A20
A21
—
—
A22
A23
A24
A25