Table 20.1 Ubc Registers - Hitachi SH7750 Hardware Manual

Table 20.1 shows the UBC registers.

Table 20.1 UBC Registers

Name Abbreviation
Break address BARA
register A
Break address BAMRA
mask
register A
Break bus BBRA
cycle register A
Break ASID BASRA
register A
Break address BARB
register B
Break address BAMRB
mask
register B
Break bus BBRB
cycle register B
Break ASID BASRB
register B
Break data BDRB
register B
Break data BDMRB
mask register B
Break control BRCR
register
Note: * Some bits are not initialized. See section 20.2.12, Break Control Register (BRCR), for
details.
R/W Initial Value
R/W Undefined
R/W Undefined
R/W H'0000
R/W Undefined
R/W Undefined
R/W Undefined
R/W H'0000
R/W Undefined
R/W Undefined
R/W Undefined
R/W H'0000*
Area 7
P4 Address Address
H'FF200000 H'1F200000
H'FF200004 H'1F200004
H'FF200008 H'1F200008
H'FF000014 H'1F000014
H'FF20000C H'1F20000C
H'FF200010 H'1F200010
H'FF200014 H'1F200014
H'FF000018 H'1F000018
H'FF200018 H'1F200018
H'FF20001C H'1F20001C
H'FF200020 H'1F200020
Rev. 6.0, 07/02, page 775 of 986
Access
Size
32
8
16
8
32
8
16
8
32
32
16