Access Time Calculations; Bit Boot Rom Timing; Access Time Computation Diagram - Motorola MC68340 User Manual

CLKOUT
CS0
Q1
DSACK0

10.2.2 Access Time Calculations

The two time paths that are critical in an MC68340 application using the CS signals are
shown in Figure 10-10. The first path is the time from address valid to when data must be
available to the processor; the second path is the time from CS asserted to when data
must be available to the processor.
Figure 10-10. Access Time Computation Diagram
As shown in the diagram, an equation for the address access time, t ADV , can be
developed as follows:
where:
t cyc = system CLKOUT period
N c = number of clocks per bus cycle
t s6 = CLKOUT high to address valid = 30 ns maximum at 16.78 MHz
t s27 = data-in valid to CLKOUT low setup = 5 ns minimum at 16.78 MHz
10-6
Freescale Semiconductor, Inc.
S0 S1 S2 SW SW
Figure 10-9. 8-bit Boot ROM Timing
S0 S1
CLKOUT
t 6
A31–A0
t
9
CS
D15–D0
t
ADV
t ADV = t cyc (N c – 0.5) – t s9 – t s27
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SW SW S3 S4 S5 S0
S4 S5
t 27
t
CSDV
S1 S2
S0
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