Clock-Select Register (Csr) - Motorola MC68340 User Manual

Integrated processor with dma
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7.4.1.6 CLOCK-SELECT REGISTER (CSR). The CSR selects the baud rate clock for the
channel receiver and transmitter. This register can only be written when the serial module
is enabled (i.e., the STP bit in the MCR is cleared).
This register should only be written after the external crystal is
stable (XTAL_RDY bit of the ISR is zero).
RCS3–RCS0—Receiver Clock Select
These bits select the baud rate clock for the channel receiver from a set of baud rates
listed in Table 7-4. The baud rate set selected depends upon the auxiliary control
register (ACR) bit 7. Set 1 is selected if ACR bit 7 = 0, and set 2 is selected if ACR bit
7 = 1. The receiver clock is always 16 times the baud rate shown in this list, except
when SCLK is used.
7-26
Freescale Semiconductor, Inc.
NOTE
CSRA, CSRB
7
6
5
4
RCS3
RCS2
RCS1
RCS0
RESET:
0
0
0
0
Write Only
Table 7-4. RCSx Control Bits
RCS3
RCS2
RCS1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
MC68340 USER'S MANUAL
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3
2
1
0
TCS3
TCS2
TCS1
TCS0
0
0
0
0
Supervisor/User
RCS0
Set 1
Set 2
0
50
75
1
110
110
0
134.5
134.5
1
200
150
0
300
300
1
600
600
0
1200
1200
1
1050
2000
0
2400
2400
1
4800
4800
0
7200
1800
1
9600
9600
0
38.4k
19.2k
1
76.8k
38.4k
0
SCLK/16
SCLK/16
1
SCLK/1
SCLK/1
MOTOROLA

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