Dell EMC PowerEdge R940 Installation And Service Manual page 68

Table 21. Supported NVDIMM-N for dual processor configurations (continued)
Configuration
Configuration 14
Table 22. Supported NVDIMM-N for quad processor configurations
Configuration
Configuration 1
Configuration 2
Configuration 3
Configuration 4
Configuration 5
Configuration 6
Configuration 7
Configuration 8
68 Installing and removing system components
Description
12x 32 GB RDIMMs, 12x
NVDIMM-Ns
Description
24x 16 GB RDIMMs, 1x
NVDIMM-N
24x 32 GB RDIMMs, 1x
NVDIMM-N
47x 32 GB RDIMMs, 1x
NVDIMM-N
24x 16 GB RDIMMs, 2x
NVDIMM-Ns
24x 32 GB RDIMMs, 2x
NVDIMM-Ns
46x 32 GB RDIMMs, 2x
NVDIMM-Ns
24x 16 GB RDIMMs, 4x
NVDIMM-Ns
24x 32 GB RDIMMs, 4x
NVDIMMs
Memory population rules
RDIMMs
Same for all 12x
RDIMM configurations. See
Configuration 1.
Memory population rules
RDIMMs
Processor1 {A1, 2, 3, 4, 5, 6},
Processor2 {B1, 2, 3, 4, 5, 6},
Processor3 {C1, 2, 3, 4, 5, 6}
Processor4 {D1, 2, 3, 4, 5, 6}
Same for all 24x
RDIMM configurations. See
Configuration 1.
Processor1 {A1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 12} ,
Processor2 {B1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11} ,
Processor3 {C1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12}
Processor 4 {D1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12}
Processor1 {A1, 2, 3, 4, 5, 6},
Processor2 {B1, 2, 3, 4, 5, 6}
Processor3 {C1, 2, 3, 4, 5, 6}
Processor4 {D1, 2, 3, 4, 5, 6}
Processor1 {A1, 2, 3, 4, 5, 6},
Processor2 {B1, 2, 3, 4, 5, 6},
Processor3 {C1, 2, 3, 4, 5, 6}
Processor4 {D1, 2, 3, 4, 5, 6}
Processor1 {A1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11},
Processor2 {B1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11} ,
Processor3 {C1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12}
Processor 4 {D1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12}
Processor1 {A1, 2, 3, 4, 5, 6},
Processor2 {B1, 2, 3, 4, 5, 6},
Processor3 {C1, 2, 3, 4, 5, 6}
Processor4 {D1, 2, 3, 4, 5, 6}
Processor1 {A1, 2, 3, 4, 5, 6},
Processor2 {B1, 2, 3, 4, 5, 6},
NVDIMM-N
Processor1 {A7, 8, 9, 10, 11,
12}
Processor2 {B7, 8, 9, 10, 11,
12}
NVDIMM-N
Processor1 {A7}
Processor1 {A7}
Processor2 {B12}
Processor1 {A7},
Processor2 {B7}
Processor1 {A7},
Processor2 {B7}
Processor1 {A12},
Processor2 {B12}
Processor1 {A7,8},
Processor2 {B7,8}
Processor1 {A7,8},
Processor2 {B7,8}