Mitsubishi Electric MELSEC-Q Structured Programming Manual page 63

FXCPU Structured Programming Manual
[Device & Common]
3. Caution on simultaneous instances of the ZRST instruction and a counter
The ZRST instruction resets also the last stage and reset state of T and C coils.
Accordingly, if the drive contact of X000 is ON in the following program, the counter executes counting after
the ZRST instruction is executed.
Structured ladder/FBD
M0
EN
EN
X000
EN
CC0 CCoil
K10 CValue
Program in the following way to disable counting after execution of the ZRST instruction.
M0
EN
EN
X000
EN
Timing chart
ZRST
ENO
d1
C0
X000
d2 C100
M0
RST
ENO
Current
value of C0 3
d M0
OUT_C
ENO
ZRST
ENO
d1
C0
d2 C100
RST
ENO
d M0
MEP OUT_C
ENO EN
CC0 CCoil
K10 CValue
one operation one operation
cycle cycle
4
0
OUT_C instruction
execution
ZRST instruction OUT_C instruction
execution execution
ENO
2 Devices in Detail
2.6 Counter [C]
one operation one operation
cycle cycle
2
1
OUT_C instruction
execution
Counting is executed
when X000 is ON.
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