A/D Conversion Completed Flag (Buffer Memory Address 10: Un\G10) - Mitsubishi Electric Melsec Q Series User Manual

Analog-digital converter module
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3
SPECIFICATIONS

3.4.7 A/D conversion completed flag (buffer memory address 10: Un\G10)

Example
When A/D conversion is enabled for channels 1, 2 and 6 and all conversions for these channels are
complete, 0023
(35) is stored in A/D conversion completed flag (buffer memory address 10: Un\G10) as
H
shown below.
b15 b14 b13 b12 b11 b10
0
0
0
3 - 28
(1)
When A/D conversion for the channels enabled for conversion is complete, A/D
conversion completed flag is set to 1. A/D conversion completed flag (XE) is set to
on when the conversion for all A/D conversion enabled channels is complete.
(2)
When Operating condition setting request (Y9) is set to on, the flag returns to the
default setting of 0 and changes to 1 when A/D conversion is complete.
(3)
In the case of the Q64AD module, b4 to b7 (CH5 to CH8) are invalid.
b15 b14 b13 b12 b11 b10
0
0
0
0
For the Q64AD, information for b4 to b15 is fixed at 0,
and for the Q68AD, information for b8 to b15 is fixed at 0.
b9
0
0
0
0
0
0
(4)
While Operating condition setting request (Y9) is on, 0 is stored to A/D
conversion completed flag of all channels.
(5)
When reading Digital output value, use this buffer memory area or A/D
conversion completed flag (XE) as an interlock.
b9
b8
b7
0
0
0
0
CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
b8
b7
b6
b5
b4
0
0
0
1
0
CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
2
MELSEC-Q
b6
b5
b4
b3
b2
1 : A/D conversion completed
0 : A/D conversion in
progress or not used
b3
b2
b1
b0
0
0
1
1
0023
3
b1
b0
(35)
H
3 - 28

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Melsec q64adMelsec q68advMelsec q68adi

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