GE UR Series Instruction Manual page 131

5 SETTINGS
[95] TIMER 1
[96] Cont Ip H1c On
[97] OR(3)
[98] TIMER 2
[99] = Virt Op 4
It is now possible to check that the selection of parameters will produce the required logic by converting the set of parame-
ters into a logic diagram. The result of this process is shown below, which is compared to figure: LOGIC FOR VIRTUAL
OUTPUT 4, as a check.
FLEXLOGIC ENTRY n:
85
Virt Op 4 On
FLEXLOGIC ENTRY n:
86
Virt Op 1 On
FLEXLOGIC ENTRY n:
87
Virt Op 2 On
FLEXLOGIC ENTRY n:
88
Virt Ip 1 On
FLEXLOGIC ENTRY n:
89
DIG ELEM 1 PKP
FLEXLOGIC ENTRY n:
90
XOR
FLEXLOGIC ENTRY n:
91
Virt Op 3 On
FLEXLOGIC ENTRY n:
92
OR (4)
FLEXLOGIC ENTRY n:
93
LATCH (S,R)
FLEXLOGIC ENTRY n:
94
Virt Op 3 On
FLEXLOGIC ENTRY n:
95
TIMER 1
FLEXLOGIC ENTRY n:
96
Cont Ip H1c On
FLEXLOGIC ENTRY n:
97
OR (3)
FLEXLOGIC ENTRY n:
98
TIMER 2
FLEXLOGIC ENTRY n:
99
=Virt Op 4
Figure 5–14: FLEXLOGIC™ EQUATION & LOGIC FOR VIRTUAL OUTPUT 4
7. Now write the complete FlexLogic™ expression required to implement the required logic, making an effort to assemble
the equation in an order where Virtual Outputs that will be used as inputs to operators are created before needed. In
cases where a lot of processing is required to perform considerable logic, this may be difficult to achieve, but in most
cases will not cause problems because all of the logic is calculated at least 4 times per power frequency cycle. The
possibility of a problem caused by sequential processing emphasizes the necessity to test the performance of Flex-
Logic™ before it is placed in service.
In the following equation, Virtual Output 3 is used as an input to both Latch 1 and Timer 1 as arranged in the order
shown below:
DIG ELEM 2 OP
Cont Ip H1c On
NOT
AND(2)
= Virt Op 3
Virt Op 4 On
Virt Op 1 On
Virt Op 2 On
Virt Ip 1 On
DIG ELEM 1 PKP
XOR(2)
GE Power Management
Set
LATCH
OR
XOR
Reset
T1
L90 Line Differential Relay
5.4 FLEXLOGIC™
VIRTUAL
T2
OR
OUTPUT 4
827031A2.VSD
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