Samsung OFFICESERV 7100 Service Manual page 55

2.5.5.2 Major Features
The major features of the TEPRI2 board are as follows:
Line Interface
Selectable T1/E1 signaling by programming
Register design to satisfy T1(100 Ω) and E1(120 Ω) impedances simultaneously
Surge protection according to ITU recommendation
Output port protection by a line monitor
Jitter characteristics satisfying ITU-T I.431 and G703
Selectable line coding method(HDB3, AMI)
Loss Of Signal(LOS) threshold setting
Local loop and remote loop supported
Use of DPLL to recover data and clocks
HDLC and Channel Associated Signaling(CAS) via Common Channel Signaling(CCS)
CPU (MPC852T)
This is the main processor and MPC852TZT50 by Motorola Inc. is used for this.
The the data bus of this CPU is used in 32-bit mode.
The main specifications of MPC852T are as follows:
Embedded Power PC core
4-Kbyte Data cache and 4-Kbyte Instruction cache
Memory Management Unit(MMU)
32-bit Dynamic Bus Controller
32-bit Address Lines
Memory controller(8 banks)
Fast Ethernet Controller
Two 16-bit timer and one 32-bit timer
System Integration Unit function embedded
Seven external interrupts and 18 internal interrupts
2-baud rate Generator
Two SCCs for HDLC communication
One SMC for asynchronized communication
Built-in MAC supporting 10/100 Mbps LAN
Debug interface
1.8 V Core and 3.3 V I/O operation with 5 V TTL compatibility
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OfficeServ 7100 Service Manual
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