Set Value Specification Method; Response Speed Of Counters - Mitsubishi Electric FX3G SERIES Programming Manual

FX /FX /FX Series Programmable Controllers
3G 3U 3UC
Programming Manual - Basic & Applied Instruction Edition
• The current value increases or decreases regardless of the operation of the output contact. When a counter
executes up-counting from "+2,147,483,647", the counter value becomes "−2,147,483,648". In the same way,
when a counter executes down-counting from "−2,147,483,648", the counter value becomes "+2,147,483,647".
(This type of counter is called ring counter.)
• When the reset input X013 turns ON and then RST instruction is executed, the current value of the counter is reset
to "0" and the output contact returns.
• For latched (battery backed) type counters, the current value, output contact operation and reset status are backed
up against power failure.
In FX /FX
3U 3UC
In FX PLCs, latched type counters are backed up by the EEPROM built into the PLC.
3G
• A 32-bit counter can be used as a 32-bit data register. 32-bit counters cannot be handled as target devices in 16-
bit applied instructions.
• If data beyond the set value is written to the current value register by DMOV instruction, etc., the counter continues
counting and the contact does not change when the next counting input is received.
4.6.5

Set value specification method

1. 16-bit counter
1) Specification by constant (K)
X003
2) Indirect specification (D)
X001
X003
2. 32-bit counter
1) Specification by constant (K)
X003
2) Indirect specification (D)
X001
X003
4.6.6

Response speed of counters

Counters execute counting by cyclic operating for contact operations of internal signals X, Y, M, S, C, etc. inside the
PLC.
For example, when X011 is specified as counting input, its ON duration and OFF duration should be longer than the
cycle time of the PLC (which is tens of Hz or less usually).
On the other hand, high-speed counters described later execute counting as an interrupt processing for specific input,
and can execute counting at 5 k to 6 kHz regardless of the cycle time.
PLCs, latched type counters are backed up by the battery built into the PLC.
→ For details on backup methods against power failure, refer to Section 2.6.
K100
C 0
FNC 12
K100 D 5
MOV
C 0
D 5
D5 = 100
100 counts
K43,210
C200
FNC 12
K43210 D5(D6)
DMOV
C200
D5(D6)
Constant (decimal constant): 1 to 32767
100 counts
Counts to the indirectly specified value of the defined data
register, previously set by a digital switch.
Note that the set value of a latched (battery backed) type
register is not held correctly sometimes when the battery
voltage becomes low.
Constant (decimal constant):
−2,147,483,648 to +2,147,483,647
43210 counts
Pairs of data registers are used for indirect specification.
Use a 32-bit instruction for writing the set value, and make
sure that the latter of paired registers (D6 in this example)
does not overlap with other programs because it is not
shown in ladder format.
→ For high-speed counters, refer to Section 4.7.
4 Devices in Detail
4.6 Counter [C]
1
2
3
4
5
6
7
8
9
10
101