Uart0 Interrupt Identification Register (U0Iir - 0Xe000 C008, Read Only); User Manual - Philips LPC2101 User Manual

Philips Semiconductors
Volume 1
Table 88:
Bit
8
9
31:10
9.3.7 UART0 Interrupt Identification Register (U0IIR - 0xE000 C008, Read
Only)
The U0IIR provides a status code that denotes the priority and source of a pending
interrupt. The interrupts are frozen during an U0IIR access. If an interrupt occurs during
an U0IIR access, the interrupt is recorded for the next U0IIR access.
Table 89:
Bit
0
3:1
5:4
7:6
8
9
31:10 -
Interrupts are handled as described in
interrupt handler routine can determine the cause of the interrupt and how to clear the
active interrupt. The U0IIR must be read in order to clear the interrupt prior to exiting the
Interrupt Service Routine.

User manual

UART0 Interrupt Enable Register (U0IER - address 0xE000 C004, when DLAB = 0)
bit description
Symbol Value Description
ABTOIntEn U0IER8 enables the auto-baud time-out interrupt.
0 Disable Auto-baud Time-out Interrupt.
1 Enable Auto-baud Time-out Interrupt.
ABEOIntEn U0IER9 enables the end of auto-baud interrupt.
0 Disable End of Auto-baud Interrupt.
1 Enable End of Auto-baud Interrupt.
- - Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
UART0 Interrupt Identification Register (UOIIR - address 0xE000 C008, read only)
bit description
Symbol Value Description
Interrupt Note that U0IIR[0] is active LOW. The pending interrupt can
Pending be determined by evaluating U0IIR[3:1].
0 At least one interrupt is pending.
1 No pending interrupts.
Interrupt U0IER[3:1] identifies an interrupt corresponding to the
Identification UART0 Rx FIFO. All other combinations of U0IER[3:1] not
listed above are reserved (000,100,101,111).
011 1 - Receive Line Status (RLS).
010 2a - Receive Data Available (RDA).
110 2b - Character Time-out Indicator (CTI).
001 3 - THRE Interrupt
- Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
FIFO Enable These bits are equivalent to U0FCR[0].
ABEOInt End of auto-baud interrupt. True if auto-baud has finished
successfully and interrupt is enabled.
ABTOInt Auto-baud time-out interrupt. True if auto-baud has timed
out and interrupt is enabled.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Rev. 01 — 12 January 2006
Table 90. Given the status of U0IIR[3:0], an
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
UM10161
Chapter 9: UART0
Reset
value
0
0
NA
Reset
value
1
0
NA
0
0
0
NA
88