7.3 Power Output Control Circuit
07-07-03
Fig. 7-7-4
The power output control circuit cuts off each power supply (+24V, ±12V, +5V) except 5VPS
when this machine shifts to the Super Power Save mode.
When the Super Power Save mode is activated, the PWSC signal output from the super power
save circuit on the Main PBA goes LOW.
The regulator (IC2) to generate +12V stops the supply of power when the PWSC signal goes
LOW.
The regulator (IC3) to generate -12V stops the supply of power when the PWSC signal goes
LOW and Q12 and photo-coupler (PC4) turn on. When PC4 turns on, Q13 and Q11 turn off.
This causes the supply of +5V to be stopped.
The regulator (IC4) to generate +24V stops the supply of power when the PWSC signal goes
LOW and Q5 turns on.
DP120F/DP125F Circuit Description
7-98
March 2000 © TOSHIBA TEC