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Digital Semiconductor 21174 Core Logic Chip
The bridge from the 21164 system bus to the 64-bit PCI bus is provided by the 21174
chip. It generates the required 32-bit PCI address for 21164 I/O accesses directed to the
PCI. It also accepts 64-bit double address cycles and 32-bit single address cycles. How-
ever, the 64-bit address support is subject to some constraints. Refer to Appendix A for
more information on 64-bit addressing constraints.
3.2.4 System-IO (SIO) Chip
The 82371SB SIO chip provides the bridge between the PCI bus and the ISA bus.
The SIO incorporates the logic for the following:
•
PCI and ISA Master/Slave interface
•
Fast IDE interface
•
Plug-n-Play Port for Motherboard Devices
•
Enhanced 7-channel DMA controller that supports fast DMA transfers
•
PCI Specification Revision 2.1 Compliant
•
Functionality of One 82c54 Timer
•
Two 82c59 Interrupt Controller Functions
•
X-Bus Peripheral Support
•
I/O Advanced Programmable Interrupt Controller(IOAPIC) Support
•
Nonmaskable interrupt (NMI) control logic
•
Universal Serial Bus(USB) Host Controller
•
System Power Management
Refer to Intel document 82420/82430 PCIset ISA and EISA Bridges for additional
information.
3.2.5 Ethernet LAN Controller Chip
The 21143 is an Ethernet LAN controller for both 100-Mb/s and 10-Mb/s data rates,
which provides a direct interface to the peripheral component interconnect (PCI)
local bus or the CardBus.
•
Power-Management and Power-Savings Features
•
Automatic Detection/Sensing Features
Functional Description
3–6
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