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Figure 3–2 shows the AlphaPC 164UX implementation of the 21174 core logic chip.
Figure 3–2 Main Memory Interface
pdata<127:0>
pecc<15:0>
21164
paddr<39:4>
*System Control
* addr_bus_req
adr_cmd_par
cack
cmd<3:0>
dack
fill
fill_error
fill_id
idle_bc
int4_valid<3:0>
sys_res<1:0>
tag_ctl_par
tag_dirty
pc164ux.1-2
victim_pending
3.2.1 21174 Chip Overview
The 21174 application-specific integrated circuit (ASIC) accepts addresses and com-
mands from the 21164 microprocessor and drives the main memory array with the
address, control, and clock signals. It also provides an interface to the 64-bit PCI I/O
bus.
The 21174 chip provides the following functions:
•
Serves as the interface between the 21164 microprocessor, main memory
(addressing and control), and the PCI bus. A three-entry CPU instruction queue
is implemented to capture commands should the memory or I/O port be busy.
•
Provides control to the Data Switch chips to isolate the L3 cache from the main
memory bus during private reads and writes.
Digital Semiconductor 21174 Core Logic Chip
Data
mdata<128:0>
Switches
mecc<15:0>
(X5)
pc164ux.11
enabledataswitch<0:2>
dram_addr<13:0>
*we
21174
*cas
*ras
miscellaneous
pc164ux.8-10
64-Bit PCI
I/O Bus
DIMM 0
DIMM 1
DIMM 2
DIMM 3
DIMM 4
DIMM 5
pc164ux.12-14
buf_addr<13:0>
*buf_we<5:0>
Buffers
*buf_cas<5:0>
*buf_ras<5:0>
buf_miscellaneous
pc164ux.15-17
Functional Description
3–3
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