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1.10 PCI Special/Interrupt Cycles
PCI special/interrupt cycles are located in the range 87.2000.0000 to 87.3FFF.FFFF.
The Special cycle command provides a simple message broadcasting mechanism on
the PCI. The Intel processor uses this cycle to broadcast processor status; but in gen-
eral it may be used for logical sideband signaling between PCI agents. The special
cycle contains no explicit destination address, but is broadcast to all agents. Each
receiving agent must determine if the message contained in the data field is applica-
ble to it.
A write access in the range 87.2000.0000 to 87.3FFF.FFFF causes a special cycle on
the PCI. The 21164's write data will be passed unmodified to the PCI. Software
must write the data in longword 0 of the hexword with the following fields:
•
Bytes 0 and 1 contain the encoded message.
•
Bytes 2 and 3 are message dependent (optional) data fields.
A read of the same address range will result in an Interrupt Acknowledge cycle on
the PCI and return the vector data provided by the PCI-EISA bridge to the 21164.
1.11 Hardware-Specific and Miscellaneous Register Space
These registers are located in the range 87.4000.0000 to 87.FFFF.FFFF.
Table A–11 lists the address map for the hardware-specific registers.
Table A–11 Hardware and Miscellaneous Address Map
CPU Address <39:28>
1000 0111 0100
1000 0111 0101
1000 0111 0110
1000 0111 0111
1000 0111 1000
1000 0111 1001
1000 0111 1010
1000 0111 11xx
PCI Special/Interrupt Cycles
Selected Region
General control, diagnostic, performance monitoring, and
error logging registers
Memory control registers
PCI address translation (scatter-gather, windows, and so
on)
Reserved
Miscellaneous registers
Power management registers
Interrupt controller registers
Flash ROM read/write space – for programming
System Address Space
A–31
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