Checking The Automatic Algorithm Execution Status - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 28 256-KBIT FLASH MEMORY
28.5

Checking the Automatic Algorithm Execution Status

As the flash memory uses the automatic algorithm for a process flow for programming/
erasing, you can check its internal operating status with hardware sequence flags.
Hardware Sequence Flag
Overview of hardware sequence flag
The hardware sequence flag consists of the following 5-bit outputs:
• Data polling flag (DQ7)
• Toggle bit flag (DQ6)
• Execution time-out flag (DQ5)
• Toggle bit 2 flag (DQ2)
The hardware sequence flags tell whether the write (program) or chip-erase command has been terminated
and whether an erase code write can be performed.
You can reference hardware sequence flags by read access to the address of each relevant sector in flash
memory after setting a command sequence. Note, however, that hardware sequence flags are output only
for the bank on a command-issued side.
Table 28.5-1 shows the bit allocation of the hardware sequence flags.
Table 28.5-1 Bit Allocation of Hardware Sequence Flags
• To know whether the automatic write or chip-erase command is being executed or has been terminated,
check the hardware sequence flags or the flash memory program/erase status bit in the flash memory
status register (FSR:RDY). After programming/erasing is terminated, flash memory returns to the read/
reset state.
• When creating a write/erase program, read data after checking the termination of automatic writing/
erasing with the DQ7, DQ6, DQ5, and DQ2 flags.
528
Bit No.
Hardware sequence flag
7 6 5
DQ7 DQ6 DQ5
4 3 2 1
- - DQ2
0
- -