I 2 C Interrupts - Fujitsu F2MC-8FX Hardware Manual

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CHAPTER 22 I C
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22.6 I C Interrupts
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The I C interface has a transfer interrupt and a stop interrupt which are triggered by the
following events.
• Transfer interrupt
A transfer interrupt occurs either upon completion of data transfer or when a bus
error occurs.
• Stop interrupt
A stop interrupt occurs upon detection of a stop condition or arbitration lost or upon
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access to the I C interface in stop/watch mode.
Transfer Interrupt
Table 22.6-1 shows the transfer interrupt control bits and I
Table 22.6-1 Transfer Interrupt Control Bits and I
Interrupt request flag bit
Interrupt request enable bit
Interrupt source
• Interrupt upon completion of transfer
An interrupt request is output to the CPU upon completion of data transfer if the transfer completion
interrupt request enable bit has been set to enable (IBCR10:INTE = 1). In the interrupt service routine,
write "0" to the transfer completion interrupt request flag bit (IBCR10:INT) to clear the interrupt request.
When data transfer is completed, the IBCR10:INT bit is set to "1" regardless of the value of the
IBCR10:INTE bit.
• Interrupt in response to a bus error
When the following conditions are met, a bus error is deemed to have occurred, and the I
will be stopped.
- When a stop condition is detected in master mode.
- When a start or stop condition is detected during transmission or reception of the first byte.
- When a start or stop condition is detected during transmission or reception of data (excluding the
start, first data, and stop bits).
In these cases, an interrupt request is output to the CPU if the bus error interrupt request enable bit has been
set to enable (IBCR10:BEIE = 1). In the interrupt service routine, write "0" to the bus error interrupt
request flag bit (IBCR10:BER) to clear the interrupt request. When a bus error occurs, the IBCR10:BER bit
is set to "1" regardless of the value of the IBCR10:BEIE bit.
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C interrupt sources.
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C Interrupt Sources
End of transfer
IBCR10:INT = "1"
IBCR10:INTE = "1"
Data transfer complete
Bus error
IBCR10:BER = "1"
IBCR10:BEIE = "1"
Bus error occurred
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C interface