Operating Description Of Pwm Timer Function (Fixed-Cycle Mode) - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 16 8/16-BIT COMPOSITE TIMER
16.10 Operating Description of PWM Timer Function (Fixed-cycle
mode)
This section describes the operation of the PWM timer function (fixed-cycle mode) for
the 8/16-bit composite timer.
Operation of PWM Timer Function (Fixed-cycle Mode)
The composite timer requires the settings shown in Figure 16.10-1 to serve as the PWM timer function
(fixed-cycle mode).
Figure 16.10-1 Settings for PWM Timer Function (Fixed-cycle Mode)
T00/01CR0
T00/01CR1
TMCR
T00/01DR
In PWM timer function (fixed-cycle mode), a fixed cycle PWM signal in a variable "H" pulse width is
outputted from the timer output pin (TO00/TO01). The cycle is fixed to "FF
"FFFF
H
specified by the value in the 8/16-bit composite timer 00/01 data register (T00DR/T01DR).
This function has no effect on the interrupt flag (T00CR1/T01CR1:IF). As each cycle always starts with
"H" pulse output, the timer output initial value setting bit (T00CR1/T01CR1:SO) is meaningless.
The value of the 8/16-bit composite timer 00/01 data register (T00DR/T01DR) is transferred to the
temporary storage latch (comparison data storage latch) in the comparator either when the counter starts
counting or when a counter value comparison match is detected.
When the timer stops operation, the timer output bit (TMCR0:TO0/TO1) holds the last value.
The "H" pulse is one count clock shorter than the setting value in the output waveform immediately after
activation of the timer (write "1" to the STA bit").
262
bit7 bit6
IFE C2
STA HO
1
TO1 TO0
Sets "H" pulse width (compare value)
: Used bit
×: Unused bit
1: Set "1"
0: Set "0"
" in 16-bit operation. The time is determined by the count clock selected. The "H" pulse width is
bit5 bit4 bit3
C1 C0 F3
0
IE IR BF
× × ×
IIS MOD FE11
×
bit2 bit1 bit0
F2 F1 F0
0 1 1
IF SO OE
× × ×
FE10 FE01 FE00
" in 8-bit operation or
H